Adhesion property of Cu
with dielectric materials is very poor. Under electric bias they easily
drift and cause short between metal layers. To avoid this problem a
barrier layer is deposited between dielectric and Cu trench. Even though
it decreases effective cross section of interconnects compared to drawn
dimensions, it improves reliability. The barrier thickness becomes significant
in deep submicron level and effective resistance of the interconnect
rises further. In addition to this increasing electron scattering and
self heating caused by the electron flow in interconnects due to
comparable increase in internal chip temperature also contribute to
increase interconnect resistance.
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